1. Field of the Invention
The present invention relates to three-dimensional devices.
2. Description of Related Art
Conventional three-dimensional devices such as three-dimensional ICs are fabricated in a manner described below. First, a first layer including a field effect transistor (FET) and the like is formed on an Si substrate through many steps. Next, on the first layer, a similar second layer is formed. A third layer and subsequent layers are formed in a similar manner.
However, in a conventional three-dimensional device, since the individual layers are superposed in sequence on the same substrate, an upper layer must be formed so as not to adversely affect a lower layer, and there are various constraints during fabrication (such as the upper temperature limit to prevent alteration of lower layers).
In the case of a three-dimensional device in which different layers are deposited, it is very difficult to form the individual layers with suitable device parameters (for example, gate-line width, thickness of a gate insulating film, design rules, and fabrication conditions such as temperature during fabrication).
In a conventional three-dimensional device, since the individual layers are formed on a substrate constituting the device, the substrate used must comply with the requirements both for a device substrate and for a substrate for forming individual layers. Thus, only specific substrates can be used, which is disadvantageous.
For the reasons described above, use of three-dimensional devices such as three-dimensional ICs has not yet been implemented.